* (bug #3639) BoxOnPlaneSide rewrite (Diego de Estrada/Patrick Bagget/Daniel
Gibson)
This commit is contained in:
Tim Angus
parent
15ec986478
commit
a7d33b1c54
3 changed files with 15 additions and 694 deletions
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@ -647,50 +647,14 @@ void SetPlaneSignbits (cplane_t *out) {
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BoxOnPlaneSide
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Returns 1, 2, or 1 + 2
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// this is the slow, general version
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int BoxOnPlaneSide2 (vec3_t emins, vec3_t emaxs, struct cplane_s *p)
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{
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int i;
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float dist1, dist2;
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int sides;
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vec3_t corners[2];
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for (i=0 ; i<3 ; i++)
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{
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if (p->normal[i] < 0)
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{
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corners[0][i] = emins[i];
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corners[1][i] = emaxs[i];
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}
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else
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{
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corners[1][i] = emins[i];
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corners[0][i] = emaxs[i];
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}
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}
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dist1 = DotProduct (p->normal, corners[0]) - p->dist;
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dist2 = DotProduct (p->normal, corners[1]) - p->dist;
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sides = 0;
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if (dist1 >= 0)
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sides = 1;
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if (dist2 < 0)
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sides |= 2;
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return sides;
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}
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==================
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*/
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#if !id386
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int BoxOnPlaneSide (vec3_t emins, vec3_t emaxs, struct cplane_s *p)
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int BoxOnPlaneSide(vec3_t emins, vec3_t emaxs, struct cplane_s *p)
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{
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float dist1, dist2;
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int sides;
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float dist[2];
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int sides, b, i;
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// fast axial cases
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// fast axial cases
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if (p->type < 3)
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{
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if (p->dist <= emins[p->type])
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@ -700,291 +664,27 @@ int BoxOnPlaneSide (vec3_t emins, vec3_t emaxs, struct cplane_s *p)
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return 3;
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}
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// general case
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switch (p->signbits)
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// general case
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dist[0] = dist[1] = 0;
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if (p->signbits < 8) // >= 8: default case is original code (dist[0]=dist[1]=0)
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{
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case 0:
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dist1 = p->normal[0]*emaxs[0] + p->normal[1]*emaxs[1] + p->normal[2]*emaxs[2];
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dist2 = p->normal[0]*emins[0] + p->normal[1]*emins[1] + p->normal[2]*emins[2];
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break;
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case 1:
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dist1 = p->normal[0]*emins[0] + p->normal[1]*emaxs[1] + p->normal[2]*emaxs[2];
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dist2 = p->normal[0]*emaxs[0] + p->normal[1]*emins[1] + p->normal[2]*emins[2];
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break;
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case 2:
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dist1 = p->normal[0]*emaxs[0] + p->normal[1]*emins[1] + p->normal[2]*emaxs[2];
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dist2 = p->normal[0]*emins[0] + p->normal[1]*emaxs[1] + p->normal[2]*emins[2];
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break;
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case 3:
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dist1 = p->normal[0]*emins[0] + p->normal[1]*emins[1] + p->normal[2]*emaxs[2];
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dist2 = p->normal[0]*emaxs[0] + p->normal[1]*emaxs[1] + p->normal[2]*emins[2];
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break;
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case 4:
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dist1 = p->normal[0]*emaxs[0] + p->normal[1]*emaxs[1] + p->normal[2]*emins[2];
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dist2 = p->normal[0]*emins[0] + p->normal[1]*emins[1] + p->normal[2]*emaxs[2];
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break;
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case 5:
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dist1 = p->normal[0]*emins[0] + p->normal[1]*emaxs[1] + p->normal[2]*emins[2];
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dist2 = p->normal[0]*emaxs[0] + p->normal[1]*emins[1] + p->normal[2]*emaxs[2];
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break;
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case 6:
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dist1 = p->normal[0]*emaxs[0] + p->normal[1]*emins[1] + p->normal[2]*emins[2];
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dist2 = p->normal[0]*emins[0] + p->normal[1]*emaxs[1] + p->normal[2]*emaxs[2];
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break;
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case 7:
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dist1 = p->normal[0]*emins[0] + p->normal[1]*emins[1] + p->normal[2]*emins[2];
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dist2 = p->normal[0]*emaxs[0] + p->normal[1]*emaxs[1] + p->normal[2]*emaxs[2];
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break;
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default:
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dist1 = dist2 = 0; // shut up compiler
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break;
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for (i=0 ; i<3 ; i++)
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{
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b = (p->signbits >> i) & 1;
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dist[ b] += p->normal[i]*emaxs[i];
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dist[!b] += p->normal[i]*emins[i];
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}
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}
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sides = 0;
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if (dist1 >= p->dist)
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if (dist[0] >= p->dist)
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sides = 1;
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if (dist2 < p->dist)
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if (dist[1] < p->dist)
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sides |= 2;
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return sides;
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}
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#elif __GNUC__
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// use matha.s
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#else
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#pragma warning( disable: 4035 )
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__declspec( naked ) int BoxOnPlaneSide (vec3_t emins, vec3_t emaxs, struct cplane_s *p)
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{
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static int bops_initialized;
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static int Ljmptab[8];
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__asm {
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push ebx
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cmp bops_initialized, 1
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je initialized
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mov bops_initialized, 1
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mov Ljmptab[0*4], offset Lcase0
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mov Ljmptab[1*4], offset Lcase1
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mov Ljmptab[2*4], offset Lcase2
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mov Ljmptab[3*4], offset Lcase3
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mov Ljmptab[4*4], offset Lcase4
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mov Ljmptab[5*4], offset Lcase5
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mov Ljmptab[6*4], offset Lcase6
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mov Ljmptab[7*4], offset Lcase7
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initialized:
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mov edx,dword ptr[4+12+esp]
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mov ecx,dword ptr[4+4+esp]
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xor eax,eax
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mov ebx,dword ptr[4+8+esp]
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mov al,byte ptr[17+edx]
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cmp al,8
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jge Lerror
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fld dword ptr[0+edx]
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fld st(0)
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jmp dword ptr[Ljmptab+eax*4]
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Lcase0:
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fmul dword ptr[ebx]
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fld dword ptr[0+4+edx]
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fxch st(2)
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fmul dword ptr[ecx]
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fxch st(2)
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fld st(0)
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fmul dword ptr[4+ebx]
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fld dword ptr[0+8+edx]
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fxch st(2)
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fmul dword ptr[4+ecx]
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fxch st(2)
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fld st(0)
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fmul dword ptr[8+ebx]
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fxch st(5)
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faddp st(3),st(0)
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fmul dword ptr[8+ecx]
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fxch st(1)
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faddp st(3),st(0)
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fxch st(3)
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faddp st(2),st(0)
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jmp LSetSides
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Lcase1:
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fmul dword ptr[ecx]
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fld dword ptr[0+4+edx]
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fxch st(2)
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fmul dword ptr[ebx]
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fxch st(2)
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fld st(0)
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fmul dword ptr[4+ebx]
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fld dword ptr[0+8+edx]
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fxch st(2)
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fmul dword ptr[4+ecx]
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fxch st(2)
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fld st(0)
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fmul dword ptr[8+ebx]
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fxch st(5)
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faddp st(3),st(0)
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fmul dword ptr[8+ecx]
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fxch st(1)
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faddp st(3),st(0)
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fxch st(3)
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faddp st(2),st(0)
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jmp LSetSides
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Lcase2:
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fmul dword ptr[ebx]
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fld dword ptr[0+4+edx]
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fxch st(2)
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fmul dword ptr[ecx]
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fxch st(2)
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fld st(0)
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fmul dword ptr[4+ecx]
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fld dword ptr[0+8+edx]
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fxch st(2)
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fmul dword ptr[4+ebx]
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fxch st(2)
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fld st(0)
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fmul dword ptr[8+ebx]
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fxch st(5)
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faddp st(3),st(0)
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fmul dword ptr[8+ecx]
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fxch st(1)
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faddp st(3),st(0)
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fxch st(3)
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faddp st(2),st(0)
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jmp LSetSides
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Lcase3:
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fmul dword ptr[ecx]
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fld dword ptr[0+4+edx]
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fxch st(2)
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fmul dword ptr[ebx]
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fxch st(2)
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fld st(0)
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fmul dword ptr[4+ecx]
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fld dword ptr[0+8+edx]
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fxch st(2)
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fmul dword ptr[4+ebx]
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fxch st(2)
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fld st(0)
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fmul dword ptr[8+ebx]
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fxch st(5)
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faddp st(3),st(0)
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fmul dword ptr[8+ecx]
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fxch st(1)
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faddp st(3),st(0)
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fxch st(3)
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faddp st(2),st(0)
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jmp LSetSides
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Lcase4:
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fmul dword ptr[ebx]
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fld dword ptr[0+4+edx]
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fxch st(2)
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fmul dword ptr[ecx]
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fxch st(2)
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fld st(0)
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fmul dword ptr[4+ebx]
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fld dword ptr[0+8+edx]
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fxch st(2)
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fmul dword ptr[4+ecx]
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fxch st(2)
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fld st(0)
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fmul dword ptr[8+ecx]
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fxch st(5)
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faddp st(3),st(0)
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fmul dword ptr[8+ebx]
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fxch st(1)
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faddp st(3),st(0)
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fxch st(3)
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faddp st(2),st(0)
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jmp LSetSides
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Lcase5:
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fmul dword ptr[ecx]
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fld dword ptr[0+4+edx]
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fxch st(2)
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fmul dword ptr[ebx]
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fxch st(2)
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fld st(0)
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fmul dword ptr[4+ebx]
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fld dword ptr[0+8+edx]
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fxch st(2)
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fmul dword ptr[4+ecx]
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fxch st(2)
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fld st(0)
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fmul dword ptr[8+ecx]
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fxch st(5)
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faddp st(3),st(0)
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fmul dword ptr[8+ebx]
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fxch st(1)
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faddp st(3),st(0)
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fxch st(3)
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faddp st(2),st(0)
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jmp LSetSides
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Lcase6:
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fmul dword ptr[ebx]
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fld dword ptr[0+4+edx]
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fxch st(2)
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fmul dword ptr[ecx]
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fxch st(2)
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fld st(0)
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fmul dword ptr[4+ecx]
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fld dword ptr[0+8+edx]
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fxch st(2)
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fmul dword ptr[4+ebx]
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fxch st(2)
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fld st(0)
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fmul dword ptr[8+ecx]
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fxch st(5)
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faddp st(3),st(0)
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fmul dword ptr[8+ebx]
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fxch st(1)
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faddp st(3),st(0)
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fxch st(3)
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faddp st(2),st(0)
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jmp LSetSides
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Lcase7:
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fmul dword ptr[ecx]
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fld dword ptr[0+4+edx]
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fxch st(2)
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fmul dword ptr[ebx]
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fxch st(2)
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fld st(0)
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fmul dword ptr[4+ecx]
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fld dword ptr[0+8+edx]
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fxch st(2)
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fmul dword ptr[4+ebx]
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fxch st(2)
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fld st(0)
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fmul dword ptr[8+ecx]
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fxch st(5)
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faddp st(3),st(0)
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fmul dword ptr[8+ebx]
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fxch st(1)
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faddp st(3),st(0)
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fxch st(3)
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faddp st(2),st(0)
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LSetSides:
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faddp st(2),st(0)
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fcomp dword ptr[12+edx]
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xor ecx,ecx
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fnstsw ax
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fcomp dword ptr[12+edx]
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and ah,1
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xor ah,1
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add cl,ah
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fnstsw ax
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and ah,1
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add ah,ah
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add cl,ah
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pop ebx
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mov eax,ecx
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ret
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Lerror:
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int 3
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}
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}
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#pragma warning( default: 4035 )
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#endif
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/*
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=================
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